Taiwan's chip-packaging backend just did something semiconductor suppliers rarely do twice in one year: it raised its own spending forecast twice, and pulled the rest of the supply chain up with it.

The Second Raise in Three Months

ASE Technology, the world's largest outsourced chip packaging and testing firm, told investors on July 31 that its 2026 capital budget is now 10.5 billion dollars, a further 2 billion dollar increase just three months after it had already lifted the figure to 8.5 billion dollars in April 1. That April number was itself a jump from the 5.3 billion dollars ASE spent in 2025 1. Alongside the new budget, ASE raised its target for LEAP, its leading-edge advanced packaging business, to at least 7.5 billion dollars in 2027 revenue, up from a prior 5.5 billion dollar goal and more than double what the unit is expected to book this year 1.

The driver is not new: AI accelerators need increasingly elaborate packaging to stack memory and logic together, and the backend of the chip supply chain, not the wafer fab, has become the constraint. ASE has already used that leverage to reprice. In July it raised quotes on advanced packaging formats including chip-on-wafer-on-substrate and fan-out chip-on-substrate by more than 20 percent, citing higher material and long-term investment costs, with major US customers among those absorbing the increase 5. Rather than build all of that new capacity at home, ASE and its Taiwanese peers have also been adding packaging and test capacity in the US and Southeast Asia, diversifying their footprint even as demand keeps outrunning supply 8.

UMC and AUO Widen the Circle

The capex reflex is not confined to one company. United Microelectronics, Taiwan's second-largest foundry, told investors it is raising its 2026 budget and approved a fresh expansion plan spanning two sites: additional cleanroom space at its Singapore Phase 4 facility to support silicon photonics production, and a new fab building at its flagship Tainan campus that will eventually house Phase 7 and Phase 8 capacity 3. UMC pointed to AI data center demand for connectivity and power products as the driver, alongside continued automotive electrification, and said AI-related revenue, still a modest roughly 300 million dollars this year, should top 1 billion dollars within three years 3.

Even AU Optronics, a display panel maker with no real history in advanced chip packaging, is now redirecting capital toward it. AUO approved an additional 8.641 billion New Taiwan dollars for packaging and glass substrate work in July, its second major capex approval of the year after a 14.666 billion New Taiwan dollar allocation in February, and separately committed 721 million US dollars to through-glass-via, glass-core and co-packaged optics expansion 2. Management still puts full commercial maturity for glass substrates two to three years out, but the company is moving early, using its low-margin display business as a funding base for a bet on becoming an AI hardware materials supplier 2.

The Glass Substrate Fork

The reason panel makers and foundries alike are chasing the same real estate is TSMC's own roadmap. TSMC is accelerating CoPoS, a panel-level packaging format built on 310 by 310 millimeter panels rather than round wafers, with a pilot line targeted this year, trial production in 2027 and volume production in the second half of 2028 4. The square format eliminates the wasted edge area of a round wafer and is a step toward glass-core substrates, which Taiwanese suppliers are racing to develop even as Chinese rivals Lens Technology and BOE push their own glass substrate programs, splitting the next-generation substrate race along much the same lines already visible in leading-edge logic 4. If TSMC succeeds, it could eventually bring more advanced packaging in-house rather than outsourcing it, which is part of why ASE, UMC and AUO are all spending now rather than waiting for the 2028-to-2029 ramp to clarify who wins 4.

What It Means for Investors

None of this capex is discretionary in the way it might look on a spreadsheet. TSMC alone is expected to spend 52 to 56 billion dollars in 2026, with some market estimates reaching 70 billion dollars, and the packaging ecosystem underneath it is now scaling in rough proportion 6. That is also drawing capital into the region more broadly: Southeast Asia pulled in a record 244 billion dollars in foreign direct investment in 2025, up 10 percent, with Singapore the single largest recipient and AI-linked manufacturing and data infrastructure a recurring theme 7.

For investors, the read-through is that the AI capex story in Asia is no longer just about who makes the chip. It is about who can package it, and the group of companies capturing pricing power, ASE's 20 percent quote increases, UMC's multi-year revenue visibility, AUO's pivot out of commodity displays, is expanding faster than headline foundry capex figures alone would suggest. The risk is the same one TSMC is quietly hedging against with CoPoS: if the foundries eventually bring more advanced packaging in-house, the outsourced assemblers and panel-substrate suppliers spending aggressively today could be building capacity for a customer that becomes a competitor before the decade is out 4.